PID and low?order controller design for guaranteed delay margin and pole placement

This article provides a simple low-order controller design method (including PID controllers as special cases) for class of unstable systems. First, is considered systems with two poles and pole placement delay margin issues are discussed. Then, chain integrators arbitrary stable dynamics in cascade. For given desired minimum this plants, obtained terms an inequality constraint on the sum k closed-loop poles, where number open-loop transfer function.